Intilop’s live demo of their 40G full TCP & UDP accelerator cores at Supercomputing-2015 garnered rave reviews as highly revered technology
This industry first, 8th Generation TCP & UDP Accelerator series from Intilop, now running at 40G/25G with Ultra-Low Latency across thousand sessions is based on the most mature 10G TCP&UDP core that is in volume production and deployed around the globe in several networking equipment classes.
Milpitas, CA., November 24th , 2015— Intilop, Inc., a pioneer, most respected and recognized leader in providing Ultra-Low latency and Hyper Performance Complex Networking Protocol Accelerators like Full TCP, UDP, IGMP & other Mega IP Cores, Systems and Solutions since 2009, delivers yet another industry first: a series of full TCP and UDP Accelerators with the native design running at 40G & 25 bps implementing 1024 TCP and UDP sessions in Altera Arria 10 FPGAs. This full TOE implement all stages of TCP protocol i.e. ARP, session initiation, data transfer, session termination, session retries and all other session management tasks in FPGA without involving CPU. It does it in nano-seconds as oppose to microseconds taken by TCP software stack. The live demo received remarkable reviews which was conducted in collaboration with Altera in booth #462 on Nov. 17th through 20th 2015 at the Supercomputing 2015 Conference in Austin, Texas USA.
“It was a highly significant achievement to develop a brand new architecture which implements actual 40G & 25G Full TCP and UDP Acceleration utilizing Altera’s latest Arria10 FPGA silicon technology. We used our experience of developing 7 generations of full TCP and UDP Acceleration over last 7 years to accomplish this feat. TCP & UDP exhibit latency in 100 nanosecond range across all one thousand sessions with 40G line rate throughput. Our previous Generation SX-Series10G TOE/UOE also achieved a record breaking latency of 77 ns in Altera and Xilinx FPGAs across all 16384 Sessions” said K Masood, President and CTO of Intilop.
Working out of the box solutions on various FPGA board platforms with choice of Cores implementing 1K, 512, 256, 128, 32 and fewer Concurrent TCP/UDP Sessions and IGMP V3/V2/V1 will be available in Q1 2016. According to experts, this is the only Full TCP and UDP accelerator that is in volume production and is ‘Monkey proof’ i.e. it self-recovers from network/TCP disconnection/failures among others.
Altera: https://www.altera.com/solutions/partners/ip-partners/intilop.htmlTheir previous 6 generations of Full TCP Accelerators provide up to 256 and 16384 simultaneous TCP Connections and have been available on most FPGA boards/platforms. As a pioneer, Intilop was the first company to deliver a series of Full TCP Offload Engines on FPGAs in 2009. Their sub 100 ns latency MAC+TOE&UOE are considered a ‘Gold Standard’ by the industry experts. Latency of less than 100 nanoseconds for the 8th Gen TOE and UOE at 40G and 25G sets the bar much higher for speed and performance based upon a mature, proven and TCP Protocol Compliant architecture. It not only offers ~100 ns latency and near wire speed TCP performance, it also offers customization flexibility to network architects to design world-class system-level applications tailored to their specific needs. The TOE’s architecture is highly scalable, customizable and adaptable without compromising on low latency or performance. Intilop’s product-line solutions are available in flexible FPGA/ASIC/SoC technologies which can easily accommodate diverse set of appliance maker’s technical design specifications. As a pioneer, Intilop was the first company to deliver a series of Full TCP Offload Engines on FPGAs in 2009. Their sub 100 ns latency MAC+TOE&UOE are considered a ‘Gold Standard’ by the industry experts. The latency barrier of 100 nanoseconds and throughput of more than 1 G byte/s per port had been set by them since their first 10G Series of TCP engines in 2011. Now the same performance metrics are provided across all thousand simultaneous TCP Sessions. The TOE’s Patent pending architecture is highly scalable, customizable and adaptable without compromising the low latency and performance. Intilop’s product-line solutions are available in flexible FPGA/ASIC/SoC technologies which can easily accommodate diverse set of Networking System Design specifications. Working out of the box solutions with Choice of Cores implementing 16K, 8K, 1K, 256 and 32 Concurrent TCP/UDP Sessions and IGMP V3/V2 is available now at: Xilinx: http://www.xilinx.com/products/intellectual-property/1-58SBVM.htm Altera: https://www.altera.com/solutions/partners/ip-partners/intilop.html
About Intilop: Intilop is a developer, provider, a recognized leader and pioneer in advanced networking silicon IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems.
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Intilop Corporation. 830 N Hillview Drive. Milpitas, CA 95035. PH: 408-791-6700